WebOct 12, 2024 · Applicants: SOUTHEAST UNIVERSITY, CSMC TECHNOLOGIES FAB2 CO.,LTD Inventors: SIYANG LIU, NINGBO LI, DEJIN WANG, KUI XIAO, CHI ZHANG, SHENG LI, XINYI TAO, WEIFENG SUN, LONGXING SHI Trench gate depletion mode VDMOS device and method for manufacturing the same. Patent number: 11387349 ... WebThe MOSFET manufacturing method according to claim 1, wherein spacing of the sidewalls of the first trench decrease linearly from an opening of the first trench to a bottom of the first trench. 3. The MOSFET manufacturing method according to claim 2, wherein an inclination angle of the sidewall of the first trench is 78° to 90°. 4. The MOSFET ...
EP3242329A4 - High voltage p type lateral double diffused metal …
WebAug 9, 2024 · In an embodiment, as shown in FIG. 2F, the method for manufacturing the VDMOS device further includes forming a first contact plug 208, a second contact plug 209, and a third contact plug 210 penetrating the interlayer dielectric layer 207 by photolithography or an etching process. A bottom of the first contact plug 208 is … WebDec 20, 2024 · Assigned to CSMC TECHNOLOGIES FAB2 CO., LTD., Jiangsu (CN) Filed by CSMC TECHNOLOGIES FAB2 CO., LTD., Jiangsu (CN) Claims priority of application No. 201610798447.7 (CN), filed on Aug. 31, 2016. Prior Publication US 2024/0098606 A1, Apr. 1, 2024: Int. Cl. H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/28 … raymond iblue
Chuzhou Boyou Electronic Technology Co., Ltd.:Expert,Technical …
WebAug 21, 2024 - CSMC TECHNOLOGIES FAB2 CO., LTD. A device integrated with a depletion-mode junction field-effect transistor and a method for manufacturing the device. The device includes: a well region, which is of a second conduction type and formed within a first conduction region (214); a JFET source (210), which is of a first conduction type ... WebA semiconductor device and method for manufacturing same. The semiconductor device comprises: a drift region (120); an isolation structure (130) contacting the drift region (120), the isolation structure (130) comprising a first isolation layer (132), a hole etch stop layer (134) on the first isolation layer (132), and a second isolation layer (136) on the hole etch … WebCsmc Technologies Fab2 Co., Ltd. Laterally diffused metal oxide semiconductor field-effect transistor and manufacturing method therefor US20240139544A1 (en) 2015-05-13: 2024-05-17: Csmc Technologies Fab2 Co., Ltd. Mems microphone US9977342B2 (en) 2014-06-26: 2024-05-22: Csmc Technologies Fab2 Co., Ltd. raymond i bates